Low Freq |
N/A 10 MHz |
High Freq |
N/A 40000 MHz |
Gain |
N/A 13 dB |
NF |
N/A 3.5 dB |
P1dB |
N/A 18 dBm |
IP3 |
N/A 24 dBm |
Bias Instruction |
N/A
Power-up Sequence
1. Apply VE = -5.0V 2. Apply VD = +5.0V 3. Apply the RF input signal Power-down Sequence 1. Turn off the RF input signal 2. Adjust VD to 0V 3. Adjust VE to 0V Note 1: VG = Open; The optional VG pin maybe used to override the automatic VE bias network to hard set the gate. Adjusting VG from -0.2 V to -0.6 V will change the quiescent current. If VG is used, VE should be left unconnected. Note 2: BC = Open; The BC pin is typically left unconnected unless gain bandwidth and shape change is desired. Note 3: VDET = Open; VDET pin is typically left unconnected unless a voltage reference is desired that is correlated to the output power. |
