Low Freq |
N/A 50 MHz |
High Freq |
N/A 28000 MHz |
Gain |
N/A 15 dB |
NF |
N/A 3.5 dB |
P1dB |
N/A 28 dBm |
IP3 |
N/A 38 dBm |
Bias Instruction |
N/A
Power-up Sequence
1. Apply +VIN = +11.5V Typ [+11.5 to +13V] 2. Apply RF input signal Power-down Sequence 1. Turn off the RF input signal 2. Set +VIN to 0V Theory of Operation The input voltage is regulated to provide VDD = +10.7V to the RF amplifier. VG2 = 3.5V. A negative gate voltage is generated internally starting at VGG = -2V. Vgg becomes less negative until an IDD of 250mA is achieved. IDD is actively maintained by continuously adjusting VGG during operation. The nominal gate voltage is -0.5V. |
